The present invention relates to a liquid crystal display device, and more particularly to an output circuit relative to column lines of a column driver in an active matrix liquid crystal display device.
FIG. 7 shows an exemplary structure of an active matrix liquid crystal display device. In this diagram, a liquid crystal panel 102 is composed of liquid crystal cells (pixels) 101 arrayed to form a two-dimensional matrix, and a vertical (row) driver 103 for row selection and a horizontal (column) driver (column line driving circuit) 104 for column selection are provided in the periphery of the liquid crystal panel 102.
As shown in FIG. 8, the horizontal driver 104 comprises a shift register 111 having a plurality of stages corresponding to the number n of column lines, a shift register controller 112 for controlling the shift register 111, a sampling circuit 113 for sampling data on a data bus line in synchronism with sampling pulses outputted successively from the shift register 111, a latch circuit 114 for holding the sampled data during one horizontal period, a DA converter 115 for converting the latch data into analog signal, and an output circuit 118 consisting of n output buffers 117-1-117-n for driving the column lines 116-1-116-n respectively.
In the related art output circuit of the above configuration, output ends of the output buffers 117-1-117-n are connected directly to the column lines 116-1-116-n, so that no problem is raised in particular if the output buffers 117-1-117-n structurally have sufficient driving capability with regard to both input and output currents. However, there arise some problems in case the output buffers 117-1-117-n are composed of source follower circuits for example and have sufficient driving capability merely in one direction.
If, even after charging a great load, the output ends of the output buffers 117-1-117-n are still connected to the load until being reset to the initial state, then it follows that the output circuit needs to have a complete characteristic or a sufficient time for discharging the load. For example, in case each of the output buffers 117-1-117-n consists of a source follower circuit, a power supply for the source follower circuit is required to furnish a current necessary for discharging the capacitive load, whereby the resultant power consumption is steadily rendered large.
Increasing the direct current value of the source follower circuit brings about reduction of the dynamic range, dimensional increase of the circuit area, and increase of output variations at the time of offset cancellation. This disadvantage raises an extremely serious problem when the output buffers 117-1-117-n consist of source follower circuits each composed of a polysilicon TFT (thin film transistor), since the threshold voltage Vth of a polysilicon TFT is high and variation in such threshold voltage Vth is large.
Due to the reasons mentioned, it has been difficult heretofore to constitute the output circuit by the use of a unipolar output buffer. Similarly, even in the use of an output buffer having bidirectional current output capability like a push-pull buffer, there may occur a case where an unnecessary capacitive load is charged or discharged during the DA conversion period of the DA converter 115 and also during its precharge period. In such a case, therefore, some unnecessary power is consumed.